Looking for an exciting and permanent job offering a wide variety of different assignments? As a member of an interdisciplinary team, you will work on future-orientated projects in various high-tech sectors.

Verification Engineer (m/f/d) Semiconductor
Villach, München

Your tasks

  • Digital verification of mixed-signal designs on block and system level resting upon formal and functional verification
  • Interpretation of product prerequisites to obtain verification concept and product verification specification
  • Performance of state of the art random-constraint test rigs
  • Creation of assertions to proof design with formal methods
  • Cooperation in a multi-site setting with lab and test engineers, designers, systems architects and verification engineers

Your profile

  • Completed engineering degree in electrical engineering, computer science or similar
  • Practical experience in the field of digital functional verification and common safety standards
  • Extensive programming skills in coding in System Verilog and System Verilog Assertions
  • Good knowledge of UVM methodology, scripting languages like Python or Perl and ability to interpret RTL and Gatelevel code
  • Good communication skills in English

Our benefits

  • Flat hierarchies
  • State-of-the-art IT equipment and office supplies
  • Individual continuous training options through the "ALTEN Trainings Center" digital learning platform
  • Company pension and supplementary health insurance
  • Special leave in exceptional circumstances
  • Exclusive employee discounts
  • Free beverages in our premises
  • Corporate events, such as summer and Christmas parties

Are you looking for interesting tasks and a permanent employment contract? Submit your application via email today to or fill in an application online at:


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    Beatriz Jurado Garcia
    Inter. Development Manager
    +49 89 436667-10

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